IS62WV6416FBLL-45TLI-TR

Density 1M
Org 64Kx16
Vcc 1.65-3.6V
Status Prod
Pkg Pins TSOP2(44), BGA(48)
Speed Ns 45, 55
Comment Previous Rev
Voltage Range BLL = 2.5V to 3.6V
Temp. Grade I = Industrial Grade (-40°C to +85°C)
Solder Type L = Lead-free (ROHS Compliant)
Revision F = F
Number Of Words 64 = 64K
Speed 45 = 45NS
Bit Org 16 = x16
Product Family 62 = Low Power
Operating Voltage WV = Wide Voltage Range
Package Code T = TSOP
Outpack Tape on Reel

IS62WV6416FBLL-45TLI-TR Features

  • High-speed access time: 45ns, 55ns
  • CMOS low power operation
    • Operating Current: 26 mA (max) at 125°C
    • CMOS Standby Current: 3 uA (typ) at 25°C
  • TTL compatible interface levels
  • Single power supply
    • 1.65V-2.2V VDD (IS62/65WV6416FALL)
    • 2.2V-3.6V VDD (IS62/65WV6416FBLL)
  • Three state outputs
  • Data Control for upper and lower bytes
  • Industrial and Automotive temperature support
  • 2CS Option Available

Overview

SRAM is one of random access memories. Each byte or word has an address and can be accessed randomly. SRAM has three different modes supported. Each function is described below with Truth Table. Below description is based on the device with 2 CS pins. STANDBY MODE Device enters standby mode when deselected (CS1# HIGH or CS2 LOW or both UB# and LB# are HIGH). The input and output pins (I/O0-15) are placed in a high impedance state. The current consumption in this mode will be ISB1 or ISB2. CMOS input in this mode will maximize saving power. WRITE MODE Write operation issues with Chip selected (CS1# LOW and CS2 HIGH) and Write Enable (WE#) input LOW. The input and output pins (I/O0-15) are in data input mode. Output buffers are closed during this time even if OE# is LOW. UB# and LB# enables a byte write feature. By enabling LB# LOW, data from I/O pins (I/O0 through I/O7) are written into the location specified on the address pins. And with UB# being LOW, data from I/O pins (I/O8 through I/O15) are written into the location. READ MODE Read operation issues with Chip selected (CS1# LOW and CS2 HIGH) and Write Enable (WE#) input HIGH. When OE# is LOW, output buffer turns on to make data output. Any input to I/O pins during READ mode is not permitted. UB# and LB# enables a byte read feature. By enabling LB# LOW, data from memory appears on I/O0-7. And with UB# being LOW, data from memory appears on I/O8-15. In the READ mode, output buffers can be turned off by pulling OE# HIGH. In this mode, internal device operates as READ but I/Os are in a high impedance state. Since device is in READ mode, active current is used. TRUTH TABLE.

 

Related Part Number(s)

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