| Density | 512M |
|---|---|
| Vcc | 1.65-1.95V |
| Type | Multi I/O SPI, QPI, DTR |
| Status | Contact Factory |
| Comment | |
| Frequency | 80M/166Mhz |
| Temp Range | -40 to 125°C |
| Package Type | SOIC , TFBGA |
| Vdd(V) | DWP = 1.65V-1.95V |
| Density Configuration | 512M = 512M |
| Product Family | 25 = Twin SPI Flash |
| Revision | = First Generation |
This document contains for the IS25DLP/DWP512M device. The device is a dual die stack of two IS25LP/WP256D dies. For detailed specifications, please refer to the discrete die datasheet linked below.
| Description | Stock Qty | Available Qty | Description | Stock Qty | Available Qty |
|---|---|---|---|---|---|
| IS25DWP512M-CMLE | IS25DWP512M-CMLE-TR |