IS61DDB42M36A

Density	72M
Org	2Mx36
Burst	4
Status	Prod
Speed Mhz	250, 300, 333
Comments Previous Revision	IS61DDB22M18, Application Note

Density

72M

Org

2Mx36

Burst

Status

Prod

Speed Mhz

250, 300, 333

Comments Previous Revision

IS61DDB22M18, Application Note

IS61DDB42M36A Features

2Mx36 and 4Mx18 configuration available.
On-chip delay-locked loop (DLL) for wide data valid window.
Common I/O read and write ports.
Synchronous pipeline read with late write operation.
Double Data Rate (DDR) interface for read and write input ports.
Fixed 4-bit burst for read and write operations.
Clock stop support.
Two input clocks (K and K#) for address and control registering at rising edges only. Two input clocks (C and C#) for data output control. Two echo clocks (CQ and CQ#) that are delivered simultaneously with data. +1.8V core power supply and 1.5V to1.8V VDDQ, used with 0.75V to 0.9V VREF.
HSTL input and output interface.
Registered addresses, write and read controls, byte writes, data in, and data outputs.
Full data coherency.
Boundary scan using limited set of JTAG 1149.1 functions.
Byte write capability.
Fine ball grid array (FBGA) package: 13mmx15mm and 15mmx17mm body size 165-ball (11 x 15) array
Read/write address
Read enable
Write enable
Byte writes for burst addresses first and third
Data-in for burst addresses first and third The following are registered on the rising edge of the K# clock:
Byte writes for burst addresses second and fourth

Overview

The 72Mb IS61DDB42M36A and IS61DDB44M18A are synchronous, high-performance CMOS static random access memory (SRAM) devices. These SRAMs have a common I/O bus. The rising edge of K clock initiates the read/write operation, and all internal operations are self-timed. Refer to the Timing Reference Diagram for Truth Table for a description of the basic operations of these DDR-II (Burst of 4) CIO SRAMs. Read and write addresses are registered on alternating rising edges of the K clock. Reads and writes are performed in double data rate. The following are registered internally on the rising edge of the K clock:

Description

Stock Qty

Available Qty

Description

Stock Qty

Available Qty

IS61DDB42M36A-250B4

IS61DDB42M36A-300M3

IS61DDB42M36A-250B4-TR

IS61DDB42M36A-300M3-TR

IS61DDB42M36A-250B4I

IS61DDB42M36A-300M3I