| Buy | |
|---|---|
| Density | 576M |
| Org | 32Mx18 |
| Status | Prod |
| Interface | Common I/O |
| Pkg Pins | BGA(168) |
| Cycle Time Trc | 6.67, 7.5, 8 |
| Data Rates Mbps | 2400, 2133, 1866 |
| Comment Previous Rev | IS49RL18320 |
| Package Code | B = B |
| Speed Grade | 093E = tCK = 0.93ns; tRC = 8ns |
| ROHS Version | = SnPb |
| Configuration | 18320 = 32M x 18 |
| Package Number | B = 168-ball FBGA (RLDRAM 3) |
| I/O Type | blank = RLDRAM 3 |
| Temperature Range | = Commercial (0C to 70°C) |
| Generation | A = A |
| Product Family | 49RL = RLDRAM 3 |
The IS43/46LQ32640A and IS43/46LQ32640AL are 2Gbit CMOS LPDDR4 SDRAM. The device is orga- nized as 2 channels per device, and individual channel is 8-banks and 16-bits. This product uses a double-da- ta-rate architecture to achieve high-speed operation. The double data rate architecture is essentially a 16N prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. This product offers fully synchronous operations referenced to both rising and falling edges of the clock. The data paths are internally pipelined and 16n bits prefetched to achieve very high bandwidth.