IS45S16100H-6CTLA2-TR

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Density	16M
Org	1Mx16
Vcc	3.3V
Type	SDR
Refresh	2K
Speed	6 = 166MHz
Status	Prod
Comment
Pkg Pins	TSOP2(50), BGA(60)
Temp. Grade	A2 = Automotive Grade (-40°C to +105°C)
Solder Type	L = 100% matte Sn
Number Of Words	100 = 1M
CL (CAS Latency)	C = 4
Operating Voltage Range	S = 3.3V SDR
Generation	H = H
Bus Width	16 = x16
Package Type	T = TSOP
Product Family	45 = SDR Automotive grade
Outpack	Tape on Reel

Datasheet

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IS45S16100H-6CTLA2-TR Features

Clock frequency: 200, 166, 143 MHz
Fully synchronous; all signals referenced to a positive clock edge
Two banks can be operated simultaneously and independently
Dual internal bank controlled by A11 (bank select)
Single 3.3V power supply
LVTTL interface
Programmable burst length
- (1, 2, 4, 8, full page)
Programmable burst sequence: Sequential/Interleave
2048 refresh cycles every 32ms (Com, Ind, A1 grade) or 16ms (A2 grade)
Random column address every clock cycle
Programmable CAS latency (2, 3 clocks)
Burst read/write and burst read/single write operations capability
Burst termination by burst stop and precharge command
Byte controlled by LDQM and UDQM
Packages: 400-mil 50-pin TSOP-II and 60-ball TF-BGA

Overview

ISSI’s 16Mb Synchronous DRAM IS42/4516100H is organized as a 524,288-word x 16-bit x 2-bank for improved performance. The synchronous DRAMs achieve high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input.

Related Part Number(s)

Description	Stock Qty	Available Qty	Description	Stock Qty	Available Qty
IS45S16100H-6CTLA2			IS45S16100H-6BLA1-TR
IS45S16100H-6BLA1