IS45S83200J-7CTLA1-TR

Density 256M
Org 32Mx8
Vcc 3.3V
Type SDR
Refresh 8K
Speed 7 = 143MHz
Status Prod
Comment
Pkg Pins TSOP2(54), BGA(54)
Temp. Grade A1 = Automotive Grade (-40°C to +85°C)
Solder Type L = 100% matte Sn
Generation J = J
Number Of Words 3200 = 32M
CL (CAS Latency) C = 4
Operating Voltage Range S = 3.3V SDR
Bus Width 8 = x8
Package Type T = TSOP
Product Family 45 = SDR Automotive grade
Outpack Tape on Reel

IS45S83200J-7CTLA1-TR Features

  • Clock frequency: 166, 143, 133 MHz
  • Fully synchronous; all signals referenced to a positive clock edge
  • Internal bank for hiding row access/precharge
  • Single Power supply: 3.3V + 0.3V
  • LVTTL interface
  • Programmable burst length
    • (1, 2, 4, 8, full page)
  • Programmable burst sequence: Sequential/Interleave
  • Auto Refresh (CBR)
  • Self Refresh
  • 8K refresh cycles every 32 ms (A2 grade) or 64 ms (commercial, industrial, A1 grade)
  • Random column address every clock cycle
  • Programmable CAS latency (2, 3 clocks)
  • Burst read/write and burst read/single write operations capability
  • Burst termination by burst stop and precharge command OPTIONS
  • Package: 54-pin TSOP-II 54-ball BGA

Overview

ISSI's 256Mb Synchronous DRAM achieves high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input. The 256Mb SDRAM is organized as follows.

 

Related Part Number(s)

Description Stock Qty Available Qty Description Stock Qty Available Qty
IS45S83200J-7CTLA1 IS45S83200J-7BLA1-TR
IS45S83200J IS45S83200J-7CTLA2
IS45S83200J-6BLA1 IS45S83200J-7CTLA2-TR
IS45S83200J-6BLA1-TR IS45S83200J-7TLA1
IS45S83200J-6TLA1 IS45S83200J-7TLA1-TR
IS45S83200J-6TLA1-TR IS45S83200J-7TLA2
IS45S83200J-7BLA1 IS45S83200J-7TLA2-TR