IS43R16400B-6TLI

容量 64M
規格 4Mx16
電壓 2.5V
類型 DDR
刷新 4K
速度 6 = 166MHz
狀態 Contact
評注
腳位數 TSOP2(66)
温度等级 I = Industrial Grade (-40°C to +85°C)
焊料類型 L = 100% matte Sn
Generation B = B
字數 400 = 4M
工作電壓範圍 R = 2.5V DDR or 2.5V SDR
總線寬度 16 = x16
腳位/封裝 T = TSOP
產品系列 43 = DDR/DDR2/DDR3/DDR4 Commercial/Industrial grade

IS43R16400B-6TLI 特徵

  • VDD and VDDQ: 2.5V ± 0.2V (-5, -6)
  • VDD and VDDQ: 2.6V ± 0.1V (-4)
  • SSTL_2 compatible I/O
  • Double-data rate architecture; two data transfers per clock cycle
  • Bidirectional, data strobe (DQS) is transmitted/ received with data, to be used in capturing data at the receiver
  • DQS is edge-aligned with data for READs and centre-aligned with data for WRITEs
  • Differential clock inputs (CK and CK)
  • DLL aligns DQ and DQS transitions with CK transitions
  • Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS
  • Four internal banks for concurrent operation
  • Data Mask for write data. DM masks write data at both rising and falling edges of data strobe
  • Burst Length: 2, 4 and 8
  • Burst Type: Sequential and Interleave mode
  • Programmable CAS latency: 2, 2.5, 3 and 4
  • Auto Refresh and Self Refresh Modes
  • Auto Precharge
  • TRAS Lockout supported (tRAP = tRCD) OPTIONS
  • Configuration(s): 4M x16
  • Package: 66-pin TSOP-II
  • Lead-free package available

概觀

ISSI’s 64-Mbit DDR SDRAM achieves high speed data transfer using pipeline architecture and two data word accesses per clock cycle. The 67,108,864-bit memory array is internally organized as four banks of 16Mb to allow concurrent operations. The pipeline allows Read and Write burst accesses to be virtually continuous, with the option to concatenate or truncate the bursts. The programmable features of burst length, burst sequence and CAS latency enable further advantages. The device is available in 16-bit data word size Input data is registered on the I/O pins on both edges of Data Strobe signal(s), while output data is referenced to both edges of Data Strobe and both edges of CLK. Commands are registered on the positive edges of CLK. An Auto Refresh mode is provided, along with a Self Refresh mode. All I/Os are SSTL_2 compatible.

 

相關IC编號

IC 編號 庫存數量 可用數量 IC 編號 庫存數量 可用數量
IS43R16400B-6TLI-TR 1,500 IS43R16400B-5TL-TR 1,500
IS43R16400B IS43R16400B-5TLI 66 66
IS43R16400B-4TL IS43R16400B-5TLI-TR 1,500
IS43R16400B-4TL-TR IS43R16400B-6TL 92 92
IS43R16400B-5TL 98 5 IS43R16400B-6TL-TR 1,500