IS43TR82560DL-125KBLI

容量	2G
規格	256Mx8
電壓	1.5V
類型	DDR3
刷新	8K
速度	125 = 800MHz
狀態	S=NOW
腳位數	BGA(78)
評論上一篇
温度等级	I = Industrial Grade (-40°C to +85°C)
焊料類型	L = SnAgCu
字數	2560 = 256M
CL（CAS延遲）	K = 11
Low Voltage	L = Supports 1.35V & 1.5V
工作電壓範圍	TR = 1.5V DDR3
Generation	D = D
總線寬度	8 = x8
腳位/封裝	B = BGA
產品系列	43 = DDR/DDR2/DDR3/DDR4 Commercial/Industrial grade

IS43TR82560DL-125KBLI 特徵

Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V
Low Voltage (L): VDD and VDDQ = 1.35V + 0.1V, -0.067V - Backward compatible to 1.5V
High speed data transfer rates with system frequency up to 1066 MHz
8 internal banks for concurrent operation
8n-Bit pre-fetch architecture
Programmable CAS Latency
Programmable Additive Latency: 0, CL-1,CL-2
Programmable CAS WRITE latency (CWL) based on tCK
Programmable Burst Length: 4 and 8
Programmable Burst Sequence: Sequential or Interleave
BL switch on the fly
Auto Self Refresh(ASR)
Self Refresh Temperature (SRT)
Refresh Interval: 7.8 µs (8192 cycles/64 ms) Tc= -40°C to 85°C 3.9 µs (8192 cycles/32 ms) Tc= 85°C to 105°C 1.95 µs (8192 cycles/16 ms) Tc= 105°C to 115°C 0.97 µs (8192 cycles/8 ms) Tc= 115°C to 125°C
Partial Array Self Refresh OPTIONS
Configuration: 256Mx8, 128Mx16
Package: 96-ball BGA (9mm x 13mm) for x16 78-ball BGA (8mm x 10.5mm) for x8 SPEED BIN ADVANCED INFORMATION JULY 2018
Asynchronous RESET pin
TDQS (Termination Data Strobe) supported (x8 only)
OCD (Off-Chip Driver Impedance Adjustment)
Dynamic ODT (On-Die Termination)
Driver strength : RZQ/7, RZQ/6 (RZQ = 240 Ω)
Write Leveling
Up to 200 MHz in DLL off mode