1. 矽成
  2. 動態記憶體
  3. 同步動態隨機存取記憶體
  4. Preceding 3.3V Automotive
  5. 16M 1Mx16
  6. TSOP2(50), BGA(60)
  7. IS45S16100E

  IS45S16100E

數據表
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容量 16M
規格 1Mx16
電壓 3.3V
類型 SDR
刷新 2K
速度 166, 143
狀態 Contact ISSI
評注
腳位數 TSOP2(50), BGA(60)
字數 100 = 1M
工作電壓範圍 S = 3.3V SDR
總線寬度 16 = x16
產品系列 45 = SDR Automotive grade
數據表
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IS45S16100E 特徵

  • Clock frequency: 200, 166, 143 MHz
  • Fully synchronous; all signals referenced to a positive clock edge
  • Two banks can be operated simultaneously and independently
  • Dual internal bank controlled by A11 (bank select)
  • Single 3.3V power supply
  • LVTTL interface
  • Programmable burst length
    • (1, 2, 4, 8, full page)
  • Programmable burst sequence: Sequential/Interleave
  • 2048 refresh cycles every 32ms (Com, Ind, A1 grade) or 16ms (A2 grade)
  • Random column address every clock cycle
  • Programmable CAS latency (2, 3 clocks)
  • Burst read/write and burst read/single write operations capability
  • Burst termination by burst stop and precharge command
  • Byte controlled by LDQM and UDQM
  • Packages: 400-mil 50-pin TSOP-II and 60-ball TF-BGA

概觀

ISSI’s 16Mb Synchronous DRAM IS42/4516100E is organized as a 524,288-word x 16-bit x 2-bank for improved performance. The synchronous DRAMs achieve high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input.

 

相關IC编號

IC 編號 庫存數量 可用數量 IC 編號 庫存數量 可用數量
IS45S16100E-6TLA1 117 IS45S16100E-7BLA2-TR
IS45S16100E-6TLA1-TR 1,000 IS45S16100E-7TLA1 151
IS45S16100E-7BLA1 209 209 IS45S16100E-7TLA1-TR 1,558
IS45S16100E-7BLA1-TR 6,836 IS45S16100E-7TLA2 117
IS45S16100E-7BLA2 1,888 989 IS45S16100E-7TLA2-TR 1,000