IS61WV102416FBLL-8T2LI-TR

容量 16M
規格 1Mx16
電壓 1.65~3.6
狀態 S=NOW
腳位數 TSOP1(48), TSOP2(54), BGA(48)
速度Ns 8, 10, 20
評論上一篇  
電壓範圍 BLL = 2.5V to 3.6V
温度等级 I = Industrial Grade (-40C to +85°C)
No Words 1024K = 1024K
焊料類型 L = Lead-free (ROHS Compliant)
速度 8NS = 8NS
Bit Org 16 = 16
Operating Voltage WV = Wide Voltage Range
產品系列 61 = High Speed
包裝代碼 T2 = TSOP
外包裝 Tape on Reel

IS61WV102416FBLL-8T2LI-TR 特徵

  • High-speed access time: 8ns, 10ns, 20ns
  • High- performance, low power CMOS process
  • Multiple center power and ground pins for greater noise immunity
  • TTL compatible inputs and outputs
  • Single power supply
    • 1.65V-2.2V VDD (IS61WV102416FALL)
    • 2.4V-3.6V VDD (IS61/64WV102416FBLL)
  • Packages available :
  • - 48 ball mini BGA (6mm x 8mm) - 48 pin TSOP (Type I) - 54 pin TSOP (Type II) Industrial and Automotive temperature support
  • Lead-free available

概觀

SRAM is one of random access memories. Each byte or word has an address and can be accessed randomly. SRAM has three different modes supported. Each function is described below with Truth Table. STANDBY MODE Device enters standby mode when deselected (CS# HIGH). The input and output pins (I/O0-15) are placed in a high impedance state. CMOS input in this mode will maximize saving power. WRITE MODE Write operation issues with Chip selected (CS#) and Write Enable (WE#) input LOW. The input and output pins (I/O0- 15) are in data input mode. Output buffers are closed during this time even if OE# is LOW. UB# and LB# enables a byte write feature. By enabling LB# LOW, data from I/O pins (I/O0 through I/O7) are written into the location specified on the address pins. And with UB# being LOW, data from I/O pins (I/O8 through I/O15) are written into the location. READ MODE Read operation issues with Chip selected (CS# LOW) and Write Enable (WE#) input HIGH. When OE# is LOW, output buffer turns on to make data output. Any input to I/O pins during READ mode is not permitted. UB# and LB# enables a byte read feature. By enabling LB# LOW, data from memory appears on I/O0-7. And with UB# being LOW, data from memory appears on I/O8-15. In the READ mode, output buffers can be turned off by pulling OE# HIGH. In this mode, internal device operates as READ but I/Os are in a high impedance state. Since device is in READ mode, active current is used. TRUTH TABLE.

 

相關IC编號

IS61WV102416FBLL-8T2LI IS61WV102416FALL-20TLI IS61WV102416FBLL-10BI-TR IS61WV102416FBLL-8B3LI
IS61WV102416FALL-20B2LI IS61WV102416FALL-20TLI-TR IS61WV102416FBLL-10BLI IS61WV102416FBLL-8B3LI-TR
IS61WV102416FALL-20B2LI-TR IS61WV102416FBLL-10B2I IS61WV102416FBLL-10BLI-TR IS61WV102416FBLL-8B4LI
IS61WV102416FALL-20B3LI IS61WV102416FBLL-10B2I-TR IS61WV102416FBLL-10T2LI IS61WV102416FBLL-8B4LI-TR
IS61WV102416FALL-20B3LI-TR IS61WV102416FBLL-10B2LI IS61WV102416FBLL-10T2LI-TR IS61WV102416FBLL-8BI
IS61WV102416FALL-20B4LI IS61WV102416FBLL-10B2LI-TR IS61WV102416FBLL-10TLI IS61WV102416FBLL-8BI-TR
IS61WV102416FALL-20B4LI-TR IS61WV102416FBLL-10B3LI IS61WV102416FBLL-10TLI-TR IS61WV102416FBLL-8BLI
IS61WV102416FALL-20BLI IS61WV102416FBLL-10B3LI-TR IS61WV102416FBLL-8B2I IS61WV102416FBLL-8BLI-TR
IS61WV102416FALL-20BLI-TR IS61WV102416FBLL-10B4LI IS61WV102416FBLL-8B2I-TR IS61WV102416FBLL-8TLI
IS61WV102416FALL-20T2LI IS61WV102416FBLL-10B4LI-TR IS61WV102416FBLL-8B2LI IS61WV102416FBLL-8TLI-TR
IS61WV102416FALL-20T2LI-TR IS61WV102416FBLL-10BI IS61WV102416FBLL-8B2LI-TR