IS43LQ32256B-062BLI

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容量 8G
規格 Two channel (2x16)
電壓 1.1V/1.8V
類型 LPDDR4
速度 4266, 3733, 3200
狀態 S=Q2/22
腳位數 BGA(200)
温度等级 I = Industrial Grade (-40°C to +85°C)
焊料類型 L = SnAgCu
字數 256 = 256M
工作電壓範圍 LQ = 1.1V LPDDR4
Generation B = B
總線寬度 32 = x32
腳位/封裝 B = BGA
產品系列 43 = DDR/DDR2/DDR3/DDR4 Commercial/Industrial grade

IS43LQ32256B-062BLI 特徵

  • Low-voltage Core and I/O Power Supplies VDD2 = 1.14-1.30V, VDDCA/VDDQ = 1.14-1.30V, VDD1 = 1.70-1.95V
  • High Speed Un-terminated Logic(HSUL_12) I/O Interface
  • Clock Frequency Range : 10MHz to 533MHz (data rate range : 20Mbps to 1066Mbps per I/O)
  • Four-bit Pre-fetch DDR Architecture
  • Multiplexed, double data rate, command/ad- dress inputs
  • Eight internal banks for concurrent operation
  • Bidirectional/differential data strobe per byte of data (DQS/DQS#)
  • Programmable Read/Write latencies(RL/WL) and burst lengths(4,8 or 16)
  • ZQ Calibration
  • On-chip temperature sensor to control self re- fresh rate
  • Partial
    • array self refresh(PASR)
  • Deep power-down mode(DPD)
  • Operation Temperature Commercial (TC = 0°C to 85°C) Industrial (TC = -40°C to 85°C) OPTIONS

概觀

The IS43LD16256A/32128A is 4Gbit CMOS LPDDR2 DRAM. The device is organized as 8 banks of 32Meg words of 16bits or 16Meg words of 32bits. This product uses a double-data-rate architecture to achieve high- speed operation. The double data rate architecture is essentially a 4N prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. This product offers fully synchronous operations referenced to both rising and falling edges of the clock. The data paths are internally pipelined and 4n bits prefetched to achieve very high bandwidth.

 

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