| Buy | |
|---|---|
| 容量 | 288M |
| 規格 | 32Mx9 |
| 狀態 | Prod |
| 接口 | Separate I/O |
| 腳位數 | BGA(144) |
| Cycle Time Trc | 15, 20 |
| Data Rates Mbps | 1066, 800 |
| 評論上一篇 | |
| 包裝代碼 | WB = WB |
| 速度等級 | 25 = tCK = 2.5ns; tRC = 20ns |
| ROHS版 | L = Lead-free (RoHS compliant) |
| 配置 | 93200 = 32M x 9 |
| Package Number | WB = 144 - ball WBGA (RLDRAM 2) |
| I / O類型 | S = Separate I/O |
| 溫度範圍 | I = Industrial (-40C to 85°C) |
| Generation | A = A |
| 產品系列 | 49NL = RLDRAM 2 |
| 外包裝 | Tape on Reel |
The IS43/46LQ16128A and IS43/46LQ1612AL are 2Gbit CMOS LPDDR4 SDRAM. The device is orga- nized as 1 channel per device, and individual channel is 8-banks and 16-bits. This product uses a double-da- ta-rate architecture to achieve high-speed operation. The double data rate architecture is essentially a 16N prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. This product offers fully synchronous operations referenced to both rising and falling edges of the clock. The data paths are internally pipelined and 16n bits prefetched to achieve very high bandwidth.