IS42S16100H

容量 16M
規格 1Mx16
電壓 3.3V
類型 SDR
刷新 2K
速度 200, 166, 143
狀態 Prod
評注
腳位數 TSOP2(50), BGA(60)
總線寬度 16 = x16
產品系列 42 = SDR Commercial/Industrial grade
字數 100 = 1M
工作電壓範圍 S = 3.3V SDR

IS42S16100H 特徵

  • Clock frequency: 200, 166, 143 MHz
  • Fully synchronous; all signals referenced to a positive clock edge
  • Two banks can be operated simultaneously and independently
  • Dual internal bank controlled by A11 (bank select)
  • Single 3.3V power supply
  • LVTTL interface
  • Programmable burst length
    • (1, 2, 4, 8, full page)
  • Programmable burst sequence: Sequential/Interleave
  • 2048 refresh cycles every 32ms (Com, Ind, A1 grade) or 16ms (A2 grade)
  • Random column address every clock cycle
  • Programmable CAS latency (2, 3 clocks)
  • Burst read/write and burst read/single write operations capability
  • Burst termination by burst stop and precharge command
  • Byte controlled by LDQM and UDQM
  • Packages: 400-mil 50-pin TSOP-II and 60-ball TF-BGA

概觀

ISSI’s 16Mb Synchronous DRAM IS42/4516100H is organized as a 524,288-word x 16-bit x 2-bank for improved performance. The synchronous DRAMs achieve high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input.

 

相關IC编號

IC 編號 庫存數量 可用數量 IC 編號 庫存數量 可用數量
IS42S16100H-5BL 50,000 IS42S16100H-6TL-TR 6,206
IS42S16100H-5BL-TR IS42S16100H-6TLI 4
IS42S16100H-5T IS42S16100H-6TLI-TR 6,673
IS42S16100H-5T-TR IS42S16100H-7BL 28
IS42S16100H-5TL 50,000 IS42S16100H-7BL-TR 6,507
IS42S16100H-5TL-TR IS42S16100H-7BLI 24 1,410
IS42S16100H-6BL 5,000 IS42S16100H-7BLI-TR 2,500
IS42S16100H-6BL-TR 6,077 IS42S16100H-7T
IS42S16100H-6BLI 50,000 IS42S16100H-7T-TR
IS42S16100H-6BLI-TR 6,474 IS42S16100H-7TL 10 585
IS42S16100H-6T IS42S16100H-7TL-TR 7,000
IS42S16100H-6T-TR IS42S16100H-7TLI 1 4,255
IS42S16100H-6TL 1 IS42S16100H-7TLI-TR 2,000