IS45S16400J-6CTLA2-TR

容量 64M
規格 4Mx16
電壓 3.3V
類型 SDR
刷新 4K
速度 6 = 166MHz
狀態 Prod
評注  
腳位數 TSOP2(54), BGA(54)
温度等级 A2 = Automotive Grade (-40C to +105°C)
焊料類型 L = 100% matte Sn for non-BGA or SnAgCu for BGA
腳位/封裝 T = TSOP
Generation J = J
總線寬度 16 = 16
工作電壓範圍 S = 3.3V SDR
CL(CAS延遲) C = 4
字數 4M = 4M
產品系列 45 = SDR Automotive grade
外包裝 Tape on Reel

IS45S16400J-6CTLA2-TR 特徵

  • Clock frequency: 200, 166, 143, 133 MHz
  • Fully synchronous; all signals referenced to a positive clock edge
  • Internal bank for hiding row access/precharge
  • Single 3.3V power supply
  • LVTTL interface
  • Programmable burst length
    • (1, 2, 4, 8, full page)
  • Programmable burst sequence: Sequential/Interleave
  • Self refresh modes
  • Auto refresh (CBR)
  • 4096 refresh cycles every 64 ms (Com, Ind, A1 grade) or 16ms (A2 grade)
  • Random column address every clock cycle
  • Programmable CAS latency (2, 3 clocks)
  • Burst read/write and burst read/single write operations capability
  • Burst termination by burst stop and precharge command OPTIONS
  • Package: 54-pin TSOP II 54-ball TF-BGA (8mm x 8mm) 60-ball TF-BGA (10.1mm x 6.4mm)

概觀

ISSI's 64Mb Synchronous DRAM is organized as 1,048,576 bits x 16-bit x 4-bank for improved performance. The synchronous DRAMs achieve high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input.

 

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