IS45S83200J-7TLA1

容量 256M
規格 32Mx8
電壓 3.3V
類型 SDR
刷新 8K
速度 7 = 143MHz
狀態 Prod
評注
腳位數 TSOP2(54), BGA(54)
温度等级 A1 = Automotive Grade (-40C to +85°C)
焊料類型 L = 100% matte Sn for non-BGA or SnAgCu for BGA
Generation J = J
總線寬度 8 = 8
工作電壓範圍 S = 3.3V SDR
CL(CAS延遲) T = 17
字數 32M = 32M
產品系列 45 = SDR Automotive grade

IS45S83200J-7TLA1 特徵

  • Clock frequency: 166, 143, 133 MHz
  • Fully synchronous; all signals referenced to a positive clock edge
  • Internal bank for hiding row access/precharge
  • Single Power supply: 3.3V + 0.3V
  • LVTTL interface
  • Programmable burst length
    • (1, 2, 4, 8, full page)
  • Programmable burst sequence: Sequential/Interleave
  • Auto Refresh (CBR)
  • Self Refresh
  • 8K refresh cycles every 32 ms (A2 grade) or 64 ms (commercial, industrial, A1 grade)
  • Random column address every clock cycle
  • Programmable CAS latency (2, 3 clocks)
  • Burst read/write and burst read/single write operations capability
  • Burst termination by burst stop and precharge command OPTIONS
  • Package: 54-pin TSOP-II 54-ball BGA

概觀

ISSI's 256Mb Synchronous DRAM achieves high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input. The 256Mb SDRAM is organized as follows.

 

相關IC编號

IS45S83200J-7TLA1-TR IS45S83200J-6TLA1-TR IS45S83200J-7CTLA1-TR IS45S83200J-7TLA2-TR
IS45S83200J-6BLA1 IS45S83200J-7BLA1 IS45S83200J-7CTLA2
IS45S83200J-6BLA1-TR IS45S83200J-7BLA1-TR IS45S83200J-7CTLA2-TR
IS45S83200J-6TLA1 IS45S83200J-7CTLA1 IS45S83200J-7TLA2