1. 矽成
  2. 靜態隨機存取存儲器
  3. 同步 SRAM
  4. No-Wait(ZBT)
  5. 1.8V
  6. 36M 2Mx18
  7. QFP(100), BGA(165, 119)
  8. IS61NVVF204818B-7-TR

  IS61NVVF204818B-7-TR

數據表
索取報價
容量 36M
規格 2Mx18
電壓 1.8V
VccQ 1.8V
狀態 Prod
tKQ(ns) 6.5, 7.5
腳位數 QFP(100), BGA(165, 119)
速度Mhz 133, 117
評論上一版本 F
數據表
索取報價

IS61NVVF204818B-7-TR 特徵

  • 100 percent bus utilization
  • No wait cycles between Read and Write Internal self-timed write cycle
  • Individual Byte Write Control
  • Single Read/Write control pin
  • Clock controlled, registered address,
  • data and control Interleaved or linear burst sequence control us- ing MODE input
  • Three chip enables for simple depth expansion and address pipelining
  • Power Down mode
  • Common data inputs and data outputs
  • CKE pin to enable clock and suspend operation
  • JEDEC 100-pin TQFP, 119-ball PBGA, and 165- ball PBGA packages
  • Power supply: NLF: Vdd 3.3V (± 5%), Vddq 3.3V/2.5V (± 5%) NVF: Vdd 2.5V (± 5%), Vddq 2.5V (± 5%) NVVF: Vdd 1.8V (± 5%), Vddq 1.8V (± 5%)
  • JTAG Boundary Scan for PBGA packages

概觀

, 100 percent bus utilization , No wait cycles between Read and Write Internal self-timed write cycle , , Individual Byte Write Control , Single Read/Write control pin , Clock controlled, registered address,

 

相關IC编號

IC 編號 庫存數量 可用數量 IC 編號 庫存數量 可用數量
IS61NVVF204818B-7 IS61NVVF204818B