CS8968A-TR

ADC 12-bit SARADCx10-channel
內存 6KB
狀態 Prod
文件 Eval Board User Guide, eZISP+ Board PC-side Windows OS AP SW
PWM (PCA) 8-/16-bit PWMx6, /w PCA, 16-bit PWMx1
腳位尺寸(mm) LQFP-48
計時器 16-bit x3, 24-bit x 1, 30-bit WDT
閃存程序SRAM 128KB
通訊接口 Slave I2C, UART, LIN-Capable EUART, SPI, CAN Transceiver Control Signals

概觀

It behaves as the Master clock output (Master Mode), or Slave clock input (Slave Mode) of the on-chip SPI interface.

 

相關IC编號

IC 編號 庫存數量 可用數量
CS8968A