規格 1Mx16
類型 SDR
電壓 3.3V
刷新 2K
速度 6 = up to 166Mhz
腳位/封裝 T = TSOP
狀態 EOL
產品系列 42 = 商業/工業級SDRAM
總線寬度 16 = x16
字數 100 = 1M
代/版本 F
焊接 L = 100% matte Sn
温規 [空白] = 商規 (0C to +70°C)
外包裝 卷轴包

IS42S16100F-6TL-TR 特徵

  • Clock frequency: IS42/45S16100F: 200, 166, 143 MHz IS42VS16100F: 133, 100 MHz JUNE 2012
  • Fully synchronous; all signals referenced to a positive clock edge
  • Two banks can be operated simultaneously and independently
  • Dual internal bank controlled by A11 (bank select)
  • Single power supply: IS42/45S16100F: Vdd/Vddq = 3.3V IS42VS16100F: Vdd/Vddq = 1.8V
  • LVTTL interface
  • Programmable burst length
    • (1, 2, 4, 8, full page)
  • Programmable burst sequence: Sequential/Interleave
  • 2048 refresh cycles every 32 ms
  • Random column address every clock cycle
  • Programmable CAS latency (2, 3 clocks)
  • Burst read/write and burst read/single write operations capability
  • Burst termination by burst stop and precharge command
  • Byte controlled by LDQM and UDQM
  • Packages 400-mil 50-pin TSOP-II and 60-ball BGA
  • Lead-free package option


ISSI’s 16Mb Synchronous DRAM IS42S16100F, IS45S16100F and IS42VS16100F are each organized as a 524,288-word x 16-bit x 2-bank for improved performance. The synchronous DRAMs achieve high- speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input.